Results 1 ... 201 found in all logged channels for 'ice40'
(pest) bitbot[asciilifeform]: Logged on 2023-09-29 14:55:51 gregorynyssa[signpost|PeterL]: http://logs.nosuchlabs.com/log/pest/2023-09-28#1031169 << Are you speaking of iCE40 by Lattice?
(pest) phf: ascii making own pest "setun-70's base 3 architecture proved superior, but i can't fit in an ice40 unencumbered fpga!"
(pest) asciilifeform: http://logs.bitdash.io/pest/2023-02-12#1023028 << not clear from linked material whether item in question is ice40-compat. (and therefore might work with the reversed toolchain), and for that matter, asciilifeform has nfi whether the latter is even being updated by anyone
(pest) asciilifeform: on 1 box have py3.sumthing for ice40ism
(pest) asciilifeform is gonna need x11 proto for fpga lispmisms, come to think of it, the super-ice40 board dun have a display connector...
(pest) bitbot[asciilifeform|busybot]: Logged on 2022-10-28 13:56:27 asciilifeform[5]: http://logs.bitdash.io/pest/2022-10-28#1014566 << fwiw there are nao ice40-compat. ('ecp5', ~83k LUTs) w/ gb nic, for signpost's old idea re 'filter for validly signed incoming packets in dc'
(pest) bitbot[busybot]: Logged on 2022-10-28 13:56:27 asciilifeform[5]: http://logs.bitdash.io/pest/2022-10-28#1014566 << fwiw there are nao ice40-compat. ('ecp5', ~83k LUTs) w/ gb nic, for signpost's old idea re 'filter for validly signed incoming packets in dc'
(pest) bitbot[busybot|asciilifeform]: Logged on 2022-10-28 13:56:27 asciilifeform[5]: http://logs.bitdash.io/pest/2022-10-28#1014566 << fwiw there are nao ice40-compat. ('ecp5', ~83k LUTs) w/ gb nic, for signpost's old idea re 'filter for validly signed incoming packets in dc'
(pest) asciilifeform: afaik the most spacious ice40-compat. demoboard atm
(pest) asciilifeform: http://logs.bitdash.io/pest/2022-10-28#1014566 << fwiw there are nao ice40-compat. ('ecp5', ~83k LUTs) w/ gb nic, for signpost's old idea re 'filter for validly signed incoming packets in dc'
(asciilifeform) crtdaydreams: (specifically in reference to e.g. ice40s)
(asciilifeform) dulapbot: (trilema) 2017-08-31 asciilifeform: phf et al : to briefly continue http://btcbase.org/log/2017-08-31#1707895 -- picture an a4-sized plinth, of, e.g., 32 dimm slots. each can contain a card of sram, or alternatively of 4 ice40-8k's, or some peripheral ( e.g. nic magnetics. )
(asciilifeform) asciilifeform: the opensores ice40 toolchain is coupla GB of liquishit, for instance
(asciilifeform) dulapbot: Logged on 2021-10-25 13:11:41 asciilifeform: bonechewer: what's the newsworthy part ? there's already 'over9000' riscv already posted, and some even fit in ice40. (the issue with all of these is that they either fit in ice40, xor have decent performance. typically for the latter relies on various proprietary ram controllers & other periphs not included in src)
(asciilifeform) asciilifeform when answers ' the lispm could be in this 'ice40' if it were 300x larger' -- not usually satisfies interlocutor
(asciilifeform) asciilifeform: tho fwiw e.g. 'scheme83' asciilifeform suspects would readily fit in ice40 or similar tight space.
(asciilifeform) asciilifeform: demanding iron ÷ / × make the thing ~impossible to fit in e.g. ice40 tho. (not even speaking of 'make from 74xxx in junkyard').
(asciilifeform) dulapbot: Logged on 2021-10-25 13:11:41 asciilifeform: bonechewer: what's the newsworthy part ? there's already 'over9000' riscv already posted, and some even fit in ice40. (the issue with all of these is that they either fit in ice40, xor have decent performance. typically for the latter relies on various proprietary ram controllers & other periphs not included in src)
(asciilifeform) dulapbot: Logged on 2022-04-03 23:51:43 crtdaydreams: asciilifeform: been browsing ice40 chips, so far the selection of boards seems to boil down to tinyfpga-bx, fomu and the classic icebreaker. Just wondering what you have and whether or not you think GPIO would be worth it if just learning FPGA?
(asciilifeform) crtdaydreams: asciilifeform: been browsing ice40 chips, so far the selection of boards seems to boil down to tinyfpga-bx, fomu and the classic icebreaker. Just wondering what you have and whether or not you think GPIO would be worth it if just learning FPGA?
(asciilifeform) crtdaydreams: I wonder how hard it would be to string together ~multiple~ ice40s on a single board and have a couple running a microcontroller circuit?
(asciilifeform) asciilifeform wrote the rudiments of serpent for ice40, never had the cycles to finish
(asciilifeform) dulapbot: Logged on 2022-03-27 23:22:10 crtdaydreams: http://logs.nosuchlabs.com/log/asciilifeform/2022-03-27#1089762 << good links. will definitely read through. admittedly I largely forgot iCE40 was freeware, but I have a suspicion that to bake a lisp CPU you'd need more than 8k. The z80 as it stands has 8.5k~.
(asciilifeform) crtdaydreams: http://logs.nosuchlabs.com/log/asciilifeform/2022-03-27#1089762 << good links. will definitely read through. admittedly I largely forgot iCE40 was freeware, but I have a suspicion that to bake a lisp CPU you'd need more than 8k. The z80 as it stands has 8.5k~.
(asciilifeform) asciilifeform: mangol: to 'get on track', even e.g. asciilifeform + ice40k8 board could prolly do it in ~yr. but 'if wishes were horses'. hasn't a yr, or even a month, of continuous cycles, and aint aboutta
(asciilifeform) verisimilitude: I should purchase an ice40 and start playing with it already; I was thinking about an ideal system, and realized my thinking on it had grown a tad fuzzy.
(asciilifeform) dulapbot: Logged on 2021-10-25 13:11:41 asciilifeform: bonechewer: what's the newsworthy part ? there's already 'over9000' riscv already posted, and some even fit in ice40. (the issue with all of these is that they either fit in ice40, xor have decent performance. typically for the latter relies on various proprietary ram controllers & other periphs not included in src)
(asciilifeform) asciilifeform: bonechewer: what's the newsworthy part ? there's already 'over9000' riscv already posted, and some even fit in ice40. (the issue with all of these is that they either fit in ice40, xor have decent performance. typically for the latter relies on various proprietary ram controllers & other periphs not included in src)
(asciilifeform) dulapbot: Logged on 2021-09-27 16:03:13 bonechewer: Chinese are playing with ice40 too. hardware, software
(asciilifeform) dulapbot: (trilema) 2018-06-11 asciilifeform: j2 at least has the virtue of being small, and fitting in ice40 fpga.
(asciilifeform) bonechewer: Chinese are playing with ice40 too. hardware, software
(asciilifeform) asciilifeform: afaik to this day the only open-spec fpga with even close to serious gate count remains lattice's ice40.
(asciilifeform) asciilifeform has an unpublished port of FG to 'ice40', plus this, and coupla other items
(asciilifeform) asciilifeform used a simplified variant of linked piece for his unreleased ice40 FG remake
(asciilifeform) dulapbot: (trilema) 2019-04-21 asciilifeform: in entirely unrelated heathen lulz : asciilifeform found an -- apparently working -- usb 'serial device' stack for ice40 . only eats 1/3 of the LUTs in the '8k', too.
(asciilifeform) asciilifeform: bonechewer: if you're looking for a (slow) usb stack for fpga, actually exists, i tested on ice40
(asciilifeform) asciilifeform: did use 'yosys' for ice40; mostly worx
(asciilifeform) asciilifeform: punkman: in xilinx's vlsi, i.e. they encourage the use of xilinx-proprietary on-die periphs, if you want to port such design to e.g. ice40 or own silicon, nodice
(asciilifeform) asciilifeform: loox like simply standard ice40 dev board !
(asciilifeform) asciilifeform: http://logs.nosuchlabs.com/log/asciilifeform/2021-06-10#1038526 << ice40 has moar LUTs than any '80s fpga. and documented. i suspect you meant to ask '1980s FPGAs with the LUT count of high-end xilinx from 2021'
(asciilifeform) verisimilitude: I'll look into ice40 then; there's no point to buying the more capable for my first FPGA.
(asciilifeform) snsabot: Logged on 2020-01-20 19:59:57 asciilifeform: ( and in fact the only properly kosher, i.e. wholly reversed, fpga on the market , is afaik still 'ice40' , which is rather small . just barely holds a useful mipslike w/ 64bit regs. )
(asciilifeform) snsabot: Logged on 2020-05-10 22:43:59 asciilifeform: ben_vulpes: ice40 demo for instance
(asciilifeform) asciilifeform: verisimilitude: the only 1 that's been adequately reversed is ice40. however it is quite small.
(asciilifeform) snsabot: Logged on 2020-08-22 13:19:48 asciilifeform: ftr also there can be no question of a 500nm fpga holding anyffin like a nontrivial cpu. ( for comparison, e.g. ice40 -- which is ~barely~ cpu-capable -- is a 40nm product. )
(asciilifeform) asciilifeform: ftr also there can be no question of a 500nm fpga holding anyffin like a nontrivial cpu. ( for comparison, e.g. ice40 -- which is ~barely~ cpu-capable -- is a 40nm product. )
(asciilifeform) asciilifeform: ftr what asciilifeform was interested in fabbing, was simply a homogeneous-fabric fpga, scaled-up version of e.g. classic ice40 .
(asciilifeform) asciilifeform: it aint the logical conclusion of peh (that'd be a 100% clean iron on e.g. 'ice40') but has the advantage of ~0 cost takeup .
(asciilifeform) asciilifeform: sadly there aint much use for a ~40MHz mips , afaik. which is all i can get in e.g. 'ice40' fpga
(asciilifeform) asciilifeform: ben_vulpes: ice40 demo for instance
(asciilifeform) asciilifeform: whereas mips fits in e.g. 'ice40' fpga & leaves room.
(asciilifeform) asciilifeform: ( and in fact the only properly kosher, i.e. wholly reversed, fpga on the market , is afaik still 'ice40' , which is rather small . just barely holds a useful mipslike w/ 64bit regs. )
(asciilifeform) asciilifeform: http://logs.nosuchlabs.com/log/asciilifeform/2019-12-20#1004006 << reminds me of 'busblaster' which i historically used for similar. and w/ ice40, which is neat. tho still demands python3ism, annoyingly. ( and apparently not yet buyable )
(asciilifeform) asciilifeform: sadly 'ice40' is an order of magnitude too small to actually unroll an iron multiplier inside.
(asciilifeform) shinohai: I acquired ice40, but have done only minimal verilog things with it. My sole experience with mips was getting gentoo to work w/ edgerouterlite
(asciilifeform) asciilifeform: shinohai: mips port so can run on e.g. 'ice40' .
(ossasepia) asciilifeform: python3, ftr, was not entered into the ban list strictly because asciilifeform uses, sadly, 1 single program (ice40 toolchain) that runs in it. otherwise can be safely discarded afaik.
(asciilifeform) asciilifeform: i'd happily buy a lappy that consists of ips lcd + ice40 fpga + some dram sockets. but, of course, no one makes.
(trilema) BingoBoingo: http://btcbase.org/log/2019-07-24#1924470 << M seems very useful to keep on hand for ice40 or having a base for porting Cuntoo to printed MIPS in 3-7 years
(trilema) asciilifeform: to round off that thread -- asciilifeform strongly suspects that kernel would run 100-200x faster on the 10 $ 'ice40' than on opteron-cum-'M'
(trilema) asciilifeform: properly-trimmed linux userland , i suspect , would run entirely usably in 'tmsr mips'-on-ice40.
(trilema) asciilifeform: i have other 'surplus' gear also, for folx who have a use; e.g. a 'icestick' (ice40 '4k' (half-size)) proto-board, buncha similars, at some pt i'll make list
(trilema) a111: Logged on 2019-04-22 00:00 asciilifeform: in entirely unrelated heathen lulz : asciilifeform found an -- apparently working -- usb 'serial device' stack for ice40 . only eats 1/3 of the LUTs in the '8k', too.
(trilema) a111: Logged on 2019-04-22 00:00 asciilifeform: in entirely unrelated heathen lulz : asciilifeform found an -- apparently working -- usb 'serial device' stack for ice40 . only eats 1/3 of the LUTs in the '8k', too.
(trilema) asciilifeform: in entirely unrelated heathen lulz : asciilifeform found an -- apparently working -- usb 'serial device' stack for ice40 . only eats 1/3 of the LUTs in the '8k', too.
(trilema) a111: Logged on 2019-04-17 18:33 asciilifeform: meanwhile, in february, chinese 'gowin semiconductor co' cloned ice40. but if anyone thought this means 'open spec', guess again, only worx with their 'YunYuan' closed shitware toolchain.
(trilema) mp_en_viaje: !!gettrust ice40
(trilema) asciilifeform: mp_en_viaje: knowing 0 aside from the product , i would say it is not correct to put wolf in the company of koch -- wolf actually did sumthing nontrivial and useful ( mapped out the ice40 matrix )
(trilema) asciilifeform: mp_en_viaje: (as you can read further downthread) the misfortunate thing is that died before got anywhere near mature ice40 tool.
(trilema) a111: Logged on 2019-04-17 18:29 asciilifeform: meanwhile, apparently (last yr) in heathendom, https://archive.is/UVbUE << c. wolf , author of the ice40 open fpga toolchain , apparently barfed and 'went naggum'
(trilema) asciilifeform: the ice40 people , arguably 'solved half of the problem' -- they found a reasonably homogeneous chip so that they could describe the actual connections. but apparently were unable to map out the delays.
(trilema) asciilifeform: as it stands, it is just about impossible, presently, to bake even very simple dram controller for ice40
(trilema) a111: Logged on 2018-01-04 20:06 asciilifeform: in other 'news', it is apparently impossible to fit even ONE 4096-bit adder into an ice40-8k ( the largest in the series )
(trilema) bvt: asciilifeform: isn't ice40 a done thing, i.e. is there anything else to add to it?
(trilema) asciilifeform: aand last update on the ice40 page seems to be 30 jan '18. so nuffin happened there since i 1st found it. ( there was, at one point, e.g. talk of support for the larger lattice co. chips )
(trilema) asciilifeform: meanwhile, in february, chinese 'gowin semiconductor co' cloned ice40. but if anyone thought this means 'open spec', guess again, only worx with their 'YunYuan' closed shitware toolchain.
(trilema) asciilifeform: meanwhile, apparently (last yr) in heathendom, https://archive.is/UVbUE << c. wolf , author of the ice40 open fpga toolchain , apparently barfed and 'went naggum'
(trilema) asciilifeform: OriansJ: if you're interested in concrete approach of asciilifeform to design of iron, i invite to study http://nosuchlabs.com/hardware.html , item asciilifeform designed & sold ( two runs sold out 100% , possibly in near future we bake a 3rd, on ice40 and photoscintillator , as discussed in logs )
(trilema) asciilifeform: OriansJ: if i'm baking e.g. dram refresher -- then quite easily (and very frustratingly, in actual practice did, it is why it is ~impossible to bake a decent dram controller from scratch using fpga that hasn't been 'solved' ice40-style )
(trilema) asciilifeform: OriansJ: i specifically picked the part for this attribute. ( ice40 was not 'solved' yet at the time , but it has quite similar topology )
(trilema) OriansJ: spyked: well the iCE40 is a good starting point for now and I guess we can agree on that. You are right about not having to be portable but I prefer building a stack that can be used to defend against a Nexus Intruder program class attack.
(trilema) bvt: http://btcbase.org/log/2019-03-17#1903106 << i also agree that it is; i don't find myself knowledgable enough to make a decision on the republican cpu architecture, but for bootstrapping using ice40 with its limited resources a simple mips core sounded fitting.
(trilema) a111: Logged on 2019-03-17 18:55 mircea_popescu: IMO it makes no sense adopting the VM, given that apparently mips.v7 will be the republican CPU architecture on ice40. << i very much not agree ; much too soon to standardize this.
(trilema) mircea_popescu: IMO it makes no sense adopting the VM, given that apparently mips.v7 will be the republican CPU architecture on ice40. << i very much not agree ; much too soon to standardize this.
(trilema) asciilifeform: 1 annoying aspect of 'iron ffa'-gedankenexperiment, is that none of the available fpga ( either 'ice40' series, or the evil ones ) are anywhere near big enuff to prototype with. it'd have to be simulated a la http://www.loper-os.org/?p=2593 , slowly, and then straight to silicon.
(trilema) asciilifeform: also made fg-style (iirc even sores posted, and for ice40 no less)
(trilema) asciilifeform actually dug into subj of implementing compact 'soft' acoustic-modems on e.g. ice40, yr or so ago, for fyootoor applications
(trilema) asciilifeform: ( there is also a 'giant ice40' that amberglint dug up recently, that gotta be tested, but i dun even physically have 1 yet, and deliberately not bought so as not to distract from moar urgent matters )
(trilema) asciilifeform: there is also a serpent-on-ice40 thing, with similar level of unfinishitude; and a ice40-powered 'FG2', ditto.
(trilema) a111: Logged on 2019-01-02 15:31 asciilifeform: mats: i haven't built anyffing useful from ice40 with own hands yet. but, interestingly, when bought a 'scsi2sd' device for replacing disk in bolix box, found that author in fact used ice40 for the job
(trilema) asciilifeform: mats: i haven't built anyffing useful from ice40 with own hands yet. but, interestingly, when bought a 'scsi2sd' device for replacing disk in bolix box, found that author in fact used ice40 for the job
(trilema) asciilifeform: datashit also reveals a 'Dedicated DDR2/DDR3 and LPDDR2/LPDDR3 memory support with DQS logic, up to 800 Mb/s data-rate', wonder if this is supported in the ice40 chain yet
(trilema) asciilifeform: my ice40 toolchain demanded no such thing.
(trilema) amberglint: asciilifeform: the reverse-engineered toolchain for the iCE40 now supports a larger chip, the ECP5 with 85k LUTs (vs ~8k LUTs of iCE40), possibly worth taking a look at: https://github.com/SymbiFlow/prjtrellis
(trilema) asciilifeform: in other notes from last wk's dig, turns out that ice40 contains onboard otp rom , enuff to store whole config ( somehow i read the docs '9000' times prev. and missed this ).
(trilema) asciilifeform: ( very sadly, there is not a vhdl eater for ice40. but when looking over subj 2w ago, i actually came to like vhdl, it's ~exactly ada syntax. )
(trilema) asciilifeform: approx 4x the logic carpet of the fattest ice40, for comparison.
(trilema) asciilifeform: quasi-relatedly: asciilifeform found out that it is actually possible to fit an rsatron into ice40, if one uses a bit-serial multiplier into external sram. a 4096x4096 mul would then take 8192 clock cycles ( 16384 if counting all load/stores. ) but we can come back to this item laters.
(trilema) deedbot: http://www.loper-os.org/?p=2627 << Loper OS - Serpent in ICE40, Part 2.
(trilema) asciilifeform: if i were baking asic ( not sure why anybody would blow 'orbit' moneys on serpent asic, but for the sake of arg ) would unroll the sbox invocation the way it is unrolled in the pc serpent diana_coman is using, there'd be no reason not to have 128 or what, independent copies. but in the tight space of ice40 this is out of the question.
(trilema) asciilifeform: i've gathered afaik all of the commercial demo boards with ice40, they all have 1 ea.
(trilema) asciilifeform: imho, if an ice40 can be coaxed into serpenting at , say, 1MB/s, it's worth sumthing, otherwise iffy
(trilema) asciilifeform: btw, spoiler : i put the thing in an ice40-8k , simply did not have time to write up yet, and the fwd sbox in fact eats roughly 1/4 of the gates . which leaves the orig question wide open...
(trilema) deedbot: http://www.loper-os.org/?p=2593 << Loper OS - Can the Serpent Cipher fit in the ICE40 FPGA?
(trilema) asciilifeform: http://btcbase.org/log/2018-10-26#1866516 << this quickly led to dead end, incidentally -- the ice40 'icestorm' proggy dun seem to eat vhdl...
(trilema) asciilifeform: and the q of 'would serpent fit in ice40' is imho also worth answering. i'ma put it in the pipe.
(trilema) asciilifeform: ice40 eats config from a 8-legged spi rom thing, can socket it.
(trilema) asciilifeform: incidentally , baking such box doesn't marry to serpent, can replace the ice40's feed rom whenever, with whatever one likes
(trilema) asciilifeform: upstack -- ran into stack of these 'papers' when cleaning out crud, from 2yr ago when asciilifeform thought 'could make simple ciphered disk from usb2sd chip <-> ice40 <-> sdcard ' )
(trilema) asciilifeform: mircea_popescu: i'd even settle for something entirely like ice40 but with fuse/antifuse bridges
(trilema) asciilifeform: the other is political, all of the existing vendors obfuscate and keep seekrit the necessary docs to actually program the thing. ice40 happens to have been reversed, but it is ruinously small ( still ~150x bigger than the miniature xilinx i baked FG from, however , but too small even for 4096bit adder )
(trilema) asciilifeform: mircea_popescu: recall ice40 ? simple grid of LUTs, + matrix of programmable interconnects.
(trilema) a111: Logged on 2018-10-23 13:44 asciilifeform: http://btcbase.org/log/2018-10-23#1865312 << ideally we oughta bake the new one, with ice40 & scintillator, imho
(trilema) asciilifeform: mircea_popescu: classical FG also fits very reluctantly in servers, but currently i dun have a good idea re what specifically to do about this ( the 'obvious' pill is to have a pci variant, but ice40 is too small for the necessary logic, which in itself is quite gnarly )
(trilema) asciilifeform: http://btcbase.org/log/2018-10-23#1865312 << ideally we oughta bake the new one, with ice40 & scintillator, imho
(trilema) a111: Logged on 2018-09-28 16:56 Mocky: re: ice40 x250 and other projects: If I get a toe hold in Qatar, they have a 'free zone' to entice foreign R&D and tech startups which permits a new company to have 100% foreign owners, 0% tax on profits, duty free import/export. But requires them to like you and what you're trying to do.
(trilema) Mocky: re: ice40 x250 and other projects: If I get a toe hold in Qatar, they have a 'free zone' to entice foreign R&D and tech startups which permits a new company to have 100% foreign owners, 0% tax on profits, duty free import/export. But requires them to like you and what you're trying to do.
(trilema) asciilifeform: ( as it is, ice40 won't even hold ~one~ 4096bit adder ! )
(trilema) asciilifeform: Mocky: in the past i attempted a fpga rsa also. sadly the 'ice40' would need to be about 250x bigger, for it to be bakeable
(trilema) asciilifeform: for instance, i might like to bake a box with ice40 as 'mips cpu' and http://btcbase.org/log/2017-08-23#1702696 for main memory. and then for ~2k usd you can have... 16MB . and what to run on that.
(trilema) asciilifeform: mircea_popescu: i had'em for the ice40 thing, which demands such horrors as python3 etc
(trilema) asciilifeform: http://btcbase.org/log/2018-09-04#1847498 << iirc i answered this in the past, but this thread makes it even moar obvious what the pill is : make a hypertrophied ice40 (i.e. homogeneous lattice of gates.) with these, can bake alt-juniper, alt-pc, crypto, pretty much anyffing you like.
(trilema) asciilifeform: the ice40 tops out at 250MHz (and drops rapidly when you fill it up, from switch fabric propagation delay)
(trilema) asciilifeform: mircea_popescu: so happens i have a seekrit draft of ice40+isa toy
(trilema) asciilifeform: ( not even sure it'd fit on an ice40 )
(trilema) a111: Logged on 2018-07-18 14:16 asciilifeform: ave1: that'll be the gold medalist, as it will run on ice40 , i.e. 'tmsr cpu'.
(trilema) asciilifeform: ave1: that'll be the gold medalist, as it will run on ice40 , i.e. 'tmsr cpu'.
(trilema) asciilifeform: ice40 + a coupla MB of sram -- and you can (not very quickly, but) crypto.
(trilema) asciilifeform: http://btcbase.org/log/2018-07-06#1832308 << to expand on this, with the linked mips example, already can haz e.g. 32bit cpu with no pipeline, no cache, etc ~but~ fits in ice40.
(trilema) a111: Logged on 2018-07-06 14:17 ave1: thx! now if anyone can be bother to design a board with multiple ice40
(trilema) asciilifeform: ice40, unlike the xilinx cplds, also includes 32kB of onboard sram. so possibly can have small cache, or extra registers, or some other useful item.
(trilema) asciilifeform: ( ice40 is about a dozen times larger )
(trilema) ave1: thx! now if anyone can be bother to design a board with multiple ice40
(trilema) asciilifeform: the ice40 breakthrough however means that we can be own mips producer.
(trilema) asciilifeform: asciilifeform in particular would like a gnat for mips, given as the latter actually fits in an ice40
(trilema) asciilifeform: the holy grail would be to stuff this into a fpga. however ice40 isn't even remotely bigenuff.
(trilema) asciilifeform: ( better yet, ice40 lappy. but 'if wishes were horses' etc )
(trilema) asciilifeform: understand, i can have ice40 boards to fit lappy chassis roll off conveyor in 6mo, if i want.
(trilema) asciilifeform: j2 at least has the virtue of being small, and fitting in ice40 fpga.
(trilema) a111: Logged on 2018-01-04 20:06 asciilifeform: in other 'news', it is apparently impossible to fit even ONE 4096-bit adder into an ice40-8k ( the largest in the series )
(trilema) a111: Logged on 2018-01-04 20:06 asciilifeform: in other 'news', it is apparently impossible to fit even ONE 4096-bit adder into an ice40-8k ( the largest in the series )
(trilema) a111: Logged on 2018-01-04 20:06 asciilifeform: in other 'news', it is apparently impossible to fit even ONE 4096-bit adder into an ice40-8k ( the largest in the series )
(trilema) a111: Logged on 2017-09-02 19:42 asciilifeform: biggest ice part is the ICE40HX8K
(trilema) asciilifeform: in other 'news', it is apparently impossible to fit even ONE 4096-bit adder into an ice40-8k ( the largest in the series )
(trilema) asciilifeform: how close this item is, even optimistically, depends on whether it could fit in ice40-8k.
(trilema) a111: Logged on 2017-08-31 22:44 asciilifeform: phf et al : to briefly continue http://btcbase.org/log/2017-08-31#1707895 -- picture an a4-sized plinth, of, e.g., 32 dimm slots. each can contain a card of sram, or alternatively of 4 ice40-8k's, or some peripheral ( e.g. nic magnetics. )
(trilema) asciilifeform: biggest ice part is the ICE40HX8K
(trilema) a111: Logged on 2017-09-01 15:38 asciilifeform: in very very other noose : the vendor's vga and ps/2 kbd demo verilog for ice40 builds and WORX
(trilema) a111: Logged on 2017-08-31 22:23 asciilifeform: since we're on subj, asciilifeform got the recently released ice40-8k (largest in the series) going. ( there's only 1 decent dev board for the 8k, the one released by olimex ~2wks ago )
(trilema) mod6: <+asciilifeform> in very very other noose : the vendor's vga and ps/2 kbd demo verilog for ice40 builds and WORX << cool
(trilema) asciilifeform: ( olimex sells a little adapter that bolts vga db15 plug and minidin ps/2 to the ice40-1k and -8k boardz )
(trilema) asciilifeform: in very very other noose : the vendor's vga and ps/2 kbd demo verilog for ice40 builds and WORX
(trilema) asciilifeform: shinohai: i was playing with the ice40 ~decompiler~ -- not much use in battlefield, but does give interesting picture of how your netlist ends up sitting down on the iron
(trilema) a111: Logged on 2017-08-31 22:26 asciilifeform: phf: at some point ( and by this i mean when finished ffa / released 'p' ... ) i'ma have a large board made, with, say, 8 ice40-8k's, and row of dimm-holders...
(trilema) asciilifeform: phf et al : to briefly continue http://btcbase.org/log/2017-08-31#1707895 -- picture an a4-sized plinth, of, e.g., 32 dimm slots. each can contain a card of sram, or alternatively of 4 ice40-8k's, or some peripheral ( e.g. nic magnetics. )
(trilema) asciilifeform: phf: at some point ( and by this i mean when finished ffa / released 'p' ... ) i'ma have a large board made, with, say, 8 ice40-8k's, and row of dimm-holders...
(trilema) asciilifeform: since we're on subj, asciilifeform got the recently released ice40-8k (largest in the series) going. ( there's only 1 decent dev board for the 8k, the one released by olimex ~2wks ago )
(trilema) asciilifeform: tldr : a serious sanecomp board would feature a , say, 16 x 16 ~grid~ of ice40-8k.
(trilema) asciilifeform: primarily because just a basic nic controller itself would take up a whole ice40 ( ice is their low-end, barebones cpld series, and was reverses without any cooperation - through kicking and screaming of, even - lattice co )
(trilema) a111: Logged on 2017-08-21 21:18 asciilifeform: !~later tell spyked http://btcbase.org/log/2017-08-21#1701446 >> on second thought, you probably could put this chore off, olimex sells a ice40-8k (largest available) with 512k of sram glued on. and this is theoretically enough to prototype . the more pressing matter is ethernet. ( afaik nobody sells an ice40 + ethernetmagnetics . and just as with ddr dram, answer is 'lattice wants you to use their larger fpgas, with THEIR toolchain'
(trilema) a111: Logged on 2017-08-21 12:05 spyked: ok, so to sum up; 1. get ice40 fpga; 2. run fpga lisp machine (cadr?); work from that towards symbolics/ivory, or the other way around starting from symbolics.
(trilema) asciilifeform: spyked: unless you are VERY well-equipped, you will not be soldering ice40.
(trilema) asciilifeform: ice40 leaves a great deal to be desired ( it is VERY small, comparatively, and doesn't come in a no-flash version, and who knows for how long it will remain in print ) but is by far the closest thing that currently exists to the sane fpga.
(trilema) asciilifeform: spyked: only the ice40 series
(trilema) spyked: asciilifeform, was going to ask. is there particular ice40 you're recommending? it might be a while until I get one but I looked over the list and they had various types (ultralite etc.)
(trilema) asciilifeform: !~later tell spyked http://btcbase.org/log/2017-08-21#1701446 >> on second thought, you probably could put this chore off, olimex sells a ice40-8k (largest available) with 512k of sram glued on. and this is theoretically enough to prototype . the more pressing matter is ethernet. ( afaik nobody sells an ice40 + ethernetmagnetics . and just as with ddr dram, answer is 'lattice wants you to use their larger fpgas, with THEIR toolchain'
(trilema) asciilifeform: to do this, will need to make world's first ice40+ddr board -- none exist
(trilema) spyked: ok, so to sum up; 1. get ice40 fpga; 2. run fpga lisp machine (cadr?); work from that towards symbolics/ivory, or the other way around starting from symbolics.
(trilema) asciilifeform: it is almost like the ice40 aficionados are following the 'bolix-whisperers' 'we dun wanna piss off dks!111' school of thought
(trilema) asciilifeform: the working turdless-chain series is the ice40, up to 8k gate.
(trilema) asciilifeform: that is not an ice40!!!
(trilema) asciilifeform: very imho interestingly, NOBODY manufactures a board with an ice40 and a nontrivial qty of ram together.
(trilema) asciilifeform: in possibly more interesting noose, ice40 toolchain seems to build and work ok even on crapple.
(trilema) asciilifeform: ice40 series tops out at 250Mhz iirc, so it'd be a modest thing. but working.
(trilema) a111: Logged on 2017-08-04 14:54 asciilifeform: so can haz ice40!!!!
(trilema) asciilifeform: so can haz ice40!!!!
(trilema) asciilifeform: in other noose, asciilifeform built 'icestorm', 'arachne-pnr', with plain gcc 4.9 ( the only concession to idiocy on the test machine was python3 ) . and even MOST of 'yosys' ( the last step in the ice40 open sores fpga toolchain ) built. in fact, whole thing built, but linker barfs
(trilema) a111: Logged on 2017-08-03 23:02 asciilifeform: to add insult to injury, even BROWSING shithub ( where all of the 'open' ice40 projects live ) no longer works on any of my graphical wwwtrons
(trilema) asciilifeform: to add insult to injury, even BROWSING shithub ( where all of the 'open' ice40 projects live ) no longer works on any of my graphical wwwtrons
(trilema) a111: Logged on 2017-01-16 23:36 asciilifeform: leaving entirely aside the question of whether ice40 can in fact be made to do anything useful with the 'open' toolchain discussed earlier, or whether a toolchain that required clang, llvm, and ten other poetteringesque abortions is 'open'
(trilema) asciilifeform: leaving entirely aside the question of whether ice40 can in fact be made to do anything useful with the 'open' toolchain discussed earlier, or whether a toolchain that required clang, llvm, and ten other poetteringesque abortions is 'open'
(trilema) asciilifeform: (is it the lattice ice40? then why not SAY IT motherfucker)
(trilema) ascii_field: 'We have enough bits mapped that we can create a functional verilog model for almost all bitstreams generated by Lattice iCEcube2 for the iCE40 HX1K-TQ144, as long as no block memories or PLLs are used. ' << wake me up when that last part changes. and when i can get this chip from ten different chinese foundries.
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