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Results 1 ... 51 found in asciilifeform for 'ice40'

crtdaydreams: (specifically in reference to e.g. ice40s)
dulapbot: (trilema) 2017-08-31 asciilifeform: phf et al : to briefly continue http://btcbase.org/log/2017-08-31#1707895 -- picture an a4-sized plinth, of, e.g., 32 dimm slots. each can contain a card of sram, or alternatively of 4 ice40-8k's, or some peripheral ( e.g. nic magnetics. )
asciilifeform: the opensores ice40 toolchain is coupla GB of liquishit, for instance
dulapbot: Logged on 2021-10-25 13:11:41 asciilifeform: bonechewer: what's the newsworthy part ? there's already 'over9000' riscv already posted, and some even fit in ice40. (the issue with all of these is that they either fit in ice40, xor have decent performance. typically for the latter relies on various proprietary ram controllers & other periphs not included in src)
asciilifeform when answers ' the lispm could be in this 'ice40' if it were 300x larger' -- not usually satisfies interlocutor
asciilifeform: tho fwiw e.g. 'scheme83' asciilifeform suspects would readily fit in ice40 or similar tight space.
asciilifeform: demanding iron ÷ / × make the thing ~impossible to fit in e.g. ice40 tho. (not even speaking of 'make from 74xxx in junkyard').
dulapbot: Logged on 2021-10-25 13:11:41 asciilifeform: bonechewer: what's the newsworthy part ? there's already 'over9000' riscv already posted, and some even fit in ice40. (the issue with all of these is that they either fit in ice40, xor have decent performance. typically for the latter relies on various proprietary ram controllers & other periphs not included in src)
dulapbot: Logged on 2022-04-03 23:51:43 crtdaydreams: asciilifeform: been browsing ice40 chips, so far the selection of boards seems to boil down to tinyfpga-bx, fomu and the classic icebreaker. Just wondering what you have and whether or not you think GPIO would be worth it if just learning FPGA?
crtdaydreams: asciilifeform: been browsing ice40 chips, so far the selection of boards seems to boil down to tinyfpga-bx, fomu and the classic icebreaker. Just wondering what you have and whether or not you think GPIO would be worth it if just learning FPGA?
crtdaydreams: I wonder how hard it would be to string together ~multiple~ ice40s on a single board and have a couple running a microcontroller circuit?
asciilifeform wrote the rudiments of serpent for ice40, never had the cycles to finish
dulapbot: Logged on 2022-03-27 23:22:10 crtdaydreams: http://logs.nosuchlabs.com/log/asciilifeform/2022-03-27#1089762 << good links. will definitely read through. admittedly I largely forgot iCE40 was freeware, but I have a suspicion that to bake a lisp CPU you'd need more than 8k. The z80 as it stands has 8.5k~.
crtdaydreams: http://logs.nosuchlabs.com/log/asciilifeform/2022-03-27#1089762 << good links. will definitely read through. admittedly I largely forgot iCE40 was freeware, but I have a suspicion that to bake a lisp CPU you'd need more than 8k. The z80 as it stands has 8.5k~.
asciilifeform: mangol: to 'get on track', even e.g. asciilifeform + ice40k8 board could prolly do it in ~yr. but 'if wishes were horses'. hasn't a yr, or even a month, of continuous cycles, and aint aboutta
verisimilitude: I should purchase an ice40 and start playing with it already; I was thinking about an ideal system, and realized my thinking on it had grown a tad fuzzy.
dulapbot: Logged on 2021-10-25 13:11:41 asciilifeform: bonechewer: what's the newsworthy part ? there's already 'over9000' riscv already posted, and some even fit in ice40. (the issue with all of these is that they either fit in ice40, xor have decent performance. typically for the latter relies on various proprietary ram controllers & other periphs not included in src)
asciilifeform: bonechewer: what's the newsworthy part ? there's already 'over9000' riscv already posted, and some even fit in ice40. (the issue with all of these is that they either fit in ice40, xor have decent performance. typically for the latter relies on various proprietary ram controllers & other periphs not included in src)
dulapbot: Logged on 2021-09-27 16:03:13 bonechewer: Chinese are playing with ice40 too. hardware, software
dulapbot: (trilema) 2018-06-11 asciilifeform: j2 at least has the virtue of being small, and fitting in ice40 fpga.
bonechewer: Chinese are playing with ice40 too. hardware, software
asciilifeform: afaik to this day the only open-spec fpga with even close to serious gate count remains lattice's ice40.
asciilifeform has an unpublished port of FG to 'ice40', plus this, and coupla other items
asciilifeform used a simplified variant of linked piece for his unreleased ice40 FG remake
dulapbot: (trilema) 2019-04-21 asciilifeform: in entirely unrelated heathen lulz : asciilifeform found an -- apparently working -- usb 'serial device' stack for ice40 . only eats 1/3 of the LUTs in the '8k', too.
asciilifeform: bonechewer: if you're looking for a (slow) usb stack for fpga, actually exists, i tested on ice40
asciilifeform: did use 'yosys' for ice40; mostly worx
asciilifeform: punkman: in xilinx's vlsi, i.e. they encourage the use of xilinx-proprietary on-die periphs, if you want to port such design to e.g. ice40 or own silicon, nodice
asciilifeform: loox like simply standard ice40 dev board !
asciilifeform: http://logs.nosuchlabs.com/log/asciilifeform/2021-06-10#1038526 << ice40 has moar LUTs than any '80s fpga. and documented. i suspect you meant to ask '1980s FPGAs with the LUT count of high-end xilinx from 2021'
verisimilitude: I'll look into ice40 then; there's no point to buying the more capable for my first FPGA.
snsabot: Logged on 2020-01-20 19:59:57 asciilifeform: ( and in fact the only properly kosher, i.e. wholly reversed, fpga on the market , is afaik still 'ice40' , which is rather small . just barely holds a useful mipslike w/ 64bit regs. )
snsabot: Logged on 2020-05-10 22:43:59 asciilifeform: ben_vulpes: ice40 demo for instance
asciilifeform: verisimilitude: the only 1 that's been adequately reversed is ice40. however it is quite small.
snsabot: Logged on 2020-08-22 13:19:48 asciilifeform: ftr also there can be no question of a 500nm fpga holding anyffin like a nontrivial cpu. ( for comparison, e.g. ice40 -- which is ~barely~ cpu-capable -- is a 40nm product. )
asciilifeform: ftr also there can be no question of a 500nm fpga holding anyffin like a nontrivial cpu. ( for comparison, e.g. ice40 -- which is ~barely~ cpu-capable -- is a 40nm product. )
asciilifeform: ftr what asciilifeform was interested in fabbing, was simply a homogeneous-fabric fpga, scaled-up version of e.g. classic ice40 .
asciilifeform: it aint the logical conclusion of peh (that'd be a 100% clean iron on e.g. 'ice40') but has the advantage of ~0 cost takeup .
asciilifeform: sadly there aint much use for a ~40MHz mips , afaik. which is all i can get in e.g. 'ice40' fpga
asciilifeform: ben_vulpes: ice40 demo for instance
asciilifeform: whereas mips fits in e.g. 'ice40' fpga & leaves room.
asciilifeform: ( and in fact the only properly kosher, i.e. wholly reversed, fpga on the market , is afaik still 'ice40' , which is rather small . just barely holds a useful mipslike w/ 64bit regs. )
asciilifeform: http://logs.nosuchlabs.com/log/asciilifeform/2019-12-20#1004006 << reminds me of 'busblaster' which i historically used for similar. and w/ ice40, which is neat. tho still demands python3ism, annoyingly. ( and apparently not yet buyable )
asciilifeform: sadly 'ice40' is an order of magnitude too small to actually unroll an iron multiplier inside.
shinohai: I acquired ice40, but have done only minimal verilog things with it. My sole experience with mips was getting gentoo to work w/ edgerouterlite
asciilifeform: shinohai: mips port so can run on e.g. 'ice40' .
asciilifeform: i'd happily buy a lappy that consists of ips lcd + ice40 fpga + some dram sockets. but, of course, no one makes.