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Results 1 ... 30 found in asciilifeform for 'ice40'

dulapbot: Logged on 2021-09-27 16:03:13 bonechewer: Chinese are playing with ice40 too. hardware, software
dulapbot: (trilema) 2018-06-11 asciilifeform: j2 at least has the virtue of being small, and fitting in ice40 fpga.
bonechewer: Chinese are playing with ice40 too. hardware, software
asciilifeform: afaik to this day the only open-spec fpga with even close to serious gate count remains lattice's ice40.
asciilifeform has an unpublished port of FG to 'ice40', plus this, and coupla other items
asciilifeform used a simplified variant of linked piece for his unreleased ice40 FG remake
dulapbot: (trilema) 2019-04-21 asciilifeform: in entirely unrelated heathen lulz : asciilifeform found an -- apparently working -- usb 'serial device' stack for ice40 . only eats 1/3 of the LUTs in the '8k', too.
asciilifeform: bonechewer: if you're looking for a (slow) usb stack for fpga, actually exists, i tested on ice40
asciilifeform: did use 'yosys' for ice40; mostly worx
asciilifeform: punkman: in xilinx's vlsi, i.e. they encourage the use of xilinx-proprietary on-die periphs, if you want to port such design to e.g. ice40 or own silicon, nodice
asciilifeform: loox like simply standard ice40 dev board !
asciilifeform: http://logs.nosuchlabs.com/log/asciilifeform/2021-06-10#1038526 << ice40 has moar LUTs than any '80s fpga. and documented. i suspect you meant to ask '1980s FPGAs with the LUT count of high-end xilinx from 2021'
verisimilitude: I'll look into ice40 then; there's no point to buying the more capable for my first FPGA.
snsabot: Logged on 2020-01-20 19:59:57 asciilifeform: ( and in fact the only properly kosher, i.e. wholly reversed, fpga on the market , is afaik still 'ice40' , which is rather small . just barely holds a useful mipslike w/ 64bit regs. )
snsabot: Logged on 2020-05-10 22:43:59 asciilifeform: ben_vulpes: ice40 demo for instance
asciilifeform: verisimilitude: the only 1 that's been adequately reversed is ice40. however it is quite small.
snsabot: Logged on 2020-08-22 13:19:48 asciilifeform: ftr also there can be no question of a 500nm fpga holding anyffin like a nontrivial cpu. ( for comparison, e.g. ice40 -- which is ~barely~ cpu-capable -- is a 40nm product. )
asciilifeform: ftr also there can be no question of a 500nm fpga holding anyffin like a nontrivial cpu. ( for comparison, e.g. ice40 -- which is ~barely~ cpu-capable -- is a 40nm product. )
asciilifeform: ftr what asciilifeform was interested in fabbing, was simply a homogeneous-fabric fpga, scaled-up version of e.g. classic ice40 .
asciilifeform: it aint the logical conclusion of peh (that'd be a 100% clean iron on e.g. 'ice40') but has the advantage of ~0 cost takeup .
asciilifeform: sadly there aint much use for a ~40MHz mips , afaik. which is all i can get in e.g. 'ice40' fpga
asciilifeform: ben_vulpes: ice40 demo for instance
asciilifeform: whereas mips fits in e.g. 'ice40' fpga & leaves room.
asciilifeform: ( and in fact the only properly kosher, i.e. wholly reversed, fpga on the market , is afaik still 'ice40' , which is rather small . just barely holds a useful mipslike w/ 64bit regs. )
asciilifeform: http://logs.nosuchlabs.com/log/asciilifeform/2019-12-20#1004006 << reminds me of 'busblaster' which i historically used for similar. and w/ ice40, which is neat. tho still demands python3ism, annoyingly. ( and apparently not yet buyable )
asciilifeform: sadly 'ice40' is an order of magnitude too small to actually unroll an iron multiplier inside.
shinohai: I acquired ice40, but have done only minimal verilog things with it. My sole experience with mips was getting gentoo to work w/ edgerouterlite
asciilifeform: shinohai: mips port so can run on e.g. 'ice40' .
asciilifeform: i'd happily buy a lappy that consists of ips lcd + ice40 fpga + some dram sockets. but, of course, no one makes.