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feedbot: http://verisimilitudes.net/2020-12-28 << A Syndication of Verisimilitudes -- von Neumann Machines Lack Structure
trinque: morning asciilifeform, any chance you know if there's a knob to manually set the timestamp that's used in ali files? I'll spelunk through src otherwise, just curious if it's in your cache.
trinque is narrowing down the nondeterminism in his build toolchain
nubs`: Hey nerds
nubs`: What’s new
trinque: hello nubs`, nothing under the sun. how are you?
nubs`: Can’t complain! Heard ol’ what’s-his-face gave up on irc so figured I’d float on in and see how everyone is doing, post-cult
asciilifeform: ACHTUNG isp folx ! 20m power outage in cage on acct of upstream fuse change 'oops'. RK users, plox to set clocks! all who report in, will be credited +1d of service.
asciilifeform: http://logs.nosuchlabs.com/log/asciilifeform/2020-12-29#1027708 << can't say that i do. and haven't thought to do this (.ali are debug barfola, used by e.g. gnat2html, gdb, several other utils)
snsabot: Logged on 2020-12-29 11:27:51 trinque: morning asciilifeform, any chance you know if there's a knob to manually set the timestamp that's used in ali files? I'll spelunk through src otherwise, just curious if it's in your cache.
asciilifeform: imho the Right Thing re determinism would be patch for ~back end~ , to put an end to 'stuff date in binary'
asciilifeform: http://logs.nosuchlabs.com/log/asciilifeform/2020-12-29#1027711 << lol, see 4y of log!11
snsabot: Logged on 2020-12-29 11:29:36 nubs`: What’s new
asciilifeform: $ticker btc usd
btcinfobot: Current BTC price in USD: $26498.27
asciilifeform: !w poll
watchglass: Polling 0 nodes...
asciilifeform: hmm
asciilifeform: !w poll
watchglass: Polling 15 nodes...
watchglass: 205.134.172.26:8333 : Could not connect!
watchglass: 205.134.172.28:8333 : Could not connect! (Operator: whaack)
watchglass: 205.134.172.4:8333 : Could not connect!
watchglass: 205.134.172.6:8333 : Could not connect!
watchglass: 54.39.156.171:8333 : (ns562940.ip-54-39-156.net) Alive: (0.112s) V=99999 (/therealbitcoin.org:0.9.99.99/) Jumpers=0x1 (TRB-Compat.) Blocks=663527
watchglass: 71.114.46.209:8333 : (pool-71-114-46-209.washdc.fios.verizon.net) Alive: (0.106s) V=99999 (/therealbitcoin.org:0.9.99.99/) Jumpers=0x1 (TRB-Compat.) Blocks=663527 (Operator: asciilifeform)
watchglass: 143.202.160.10:8333 : Alive: (0.176s) V=70001 (/therealbitcoin.org:0.7.0.1/) Jumpers=0x1 (TRB-Compat.) Blocks=663527
watchglass: 208.94.240.42:8333 : Alive: (0.206s) V=99999 (/therealbitcoin.org:0.9.99.99/) Jumpers=0x1 (TRB-Compat.) Blocks=663527
watchglass: 213.109.238.156:8333 : Alive: (0.260s) V=99999 (/therealbitcoin.org:0.9.99.99/) Jumpers=0x1 (TRB-Compat.) Blocks=663399
watchglass: 185.85.38.54:8333 : (tlapnet-38-54.cust.tlapnet.cz) Alive: (0.334s) V=99999 (/therealbitcoin.org:0.9.99.99/) Jumpers=0x1 (TRB-Compat.) Blocks=663527
watchglass: 176.9.59.199:8333 : (static.199.59.9.176.clients.your-server.de) Alive: (0.285s) V=99999 (/therealbitcoin.org:0.9.99.99/) Jumpers=0x1 (TRB-Compat.) Blocks=391693 (Operator: jurov)
watchglass: 185.163.46.29:8333 : (185-163-46-29.mivocloud.com) Alive: (0.353s) V=99999 (/therealbitcoin.org:0.9.99.99/) Jumpers=0x1 (TRB-Compat.) Blocks=504839
watchglass: 103.36.92.112:8333 : (terebe.ns01.net) Alive: (0.573s) V=99999 (/therealbitcoin.org:0.9.99.99/) Jumpers=0x1 (TRB-Compat.) Blocks=663411
asciilifeform: loox like some folx don't have their trb in cron.
watchglass: 84.16.46.130:8333 : Violated BTC Protocol: Bad header length!
billymg: http://logs.nosuchlabs.com/log/asciilifeform/2020-12-29#1027714 << thanks for the notice, updated
snsabot: Logged on 2020-12-29 12:17:39 asciilifeform: ACHTUNG isp folx ! 20m power outage in cage on acct of upstream fuse change 'oops'. RK users, plox to set clocks! all who report in, will be credited +1d of service.
asciilifeform: billymg: ty!
asciilifeform: http://logs.nosuchlabs.com/log/asciilifeform/2020-12-29#1027707 << the only fully general-purpose genuinely non-vonneumann arch i'm familiar with, is dataflow (explicit dependency graph) . (otoh -- single-purpose non-vonneumann comps are not uncommon. e.g. here's a battlefield-deployed one of asciilifeform's design.)
snsabot: Logged on 2020-12-29 00:50:23 feedbot: http://verisimilitudes.net/2020-12-28 << A Syndication of Verisimilitudes -- von Neumann Machines Lack Structure
asciilifeform believes that it is disingenuous to refer to a vn machine with N cpus, regardless of N, as 'non-vn'.
verisimilitude: The bottleneck is exacerbated by the unnecessary traffic. It's fair to write that reducing C+NM instructions to but one for any M dramatically eliminates the bottleneck.
asciilifeform: verisimilitude: a bottleneck is still a bottleneck, even w/ no traffic ('machine switched off')
verisimilitude: Sure, but a wine bottleneck is fine for pouring wine, not relieving a dam.
verisimilitude: In any case, I like the explanation I provided; once the machine is given structure, the bottleneck could be eliminated more transparently.
verisimilitude: Of course, I'll be perfectly blunt and acknowledge I'm just burning topics off a list I've had for a ways.
asciilifeform: verisimilitude: vm sucks even w/ arbitrary memory bandwidth / channels / # of cpu. because brings in whole spittoon of architectural retardation revolving around locking
asciilifeform: *vn
verisimilitude: I think, were I to own a LispM, I wouldn't care that it's von Neumann.
asciilifeform: verisimilitude: funnily enuff, the builders of e.g. bolix's lisp gnawed at the vn leather straps quite a bit. hence the inclusion of various oddball special-purpose cpus (the 1 in the FEP; the 2 (!!) in the console ; possib. others)
asciilifeform: *lispm
verisimilitude: I don't believe I've mentioned the Reduceron, a Haskell machine, here before.
verisimilitude: I'll link to the paper.
asciilifeform: verisimilitude: iirc there was >1 of these, even
verisimilitude: It takes advantage of some parallel evaluation and hardware memoization to be competitive with a new Intel running GHC.
asciilifeform: iirc that one sat on a xilinx, and had sumthing like iron gc
verisimilitude: Yes.
asciilifeform: verisimilitude: fwiw it aint esp. hard to 'competitive w/ new intel' on fpga if correctly chosen benchmark (the most well-known example is prolly btc mining, i.e. sha2 brute)
asciilifeform actually owns the XUPV5 demoboard, of the type used by the reduceron folx
asciilifeform not into haskellism, however.
verisimilitude: Here's a link: http://www.cs.york.ac.uk/fp/reduceron/reduceron.pdf
verisimilitude: It's difficult for me to satisfactorily think about a truly ``everything happens at the same time'' machine; it's easier, were one to imagine such a machine composed out of many von Neumann machines, similarly to the Internet or Chuck Moore's GA144, however.
asciilifeform: verisimilitude: imho fg is a good example of 'all at once'
asciilifeform: and quite easy to understand.
asciilifeform: for that matter, your physical machine is invariably an 'all at once' , because that is how actual meatspace works, lol
verisimilitude: I took a glance, but I don't know Verilog nor VHDL.
verisimilitude: A cellular automata is all-at-once, but those aren't usually used for practical computation.
verisimilitude: It's simply not as mind-bending or however one would phrase it, when it feels the sequential calculations are merely better hidden, is all.
asciilifeform: verisimilitude: it would not be much of an exaggeration to say that the whole lang fits on a sheet of paper. e.g. reg [max:min] name = initvalue; creates a storage (of flipflops) of max+1 bits. wire name = someotherwire; or wire name = reg; or, wire foo = a ^ b etc connect things together, optionally via a logical op
asciilifeform: <= is permitted inside 'always' blocks; and in'em, you specify the clock trigger (e.g. 'posedge clk' if clk is yer clock wire)
asciilifeform: it assigns new value to a register. e.g. a state machine's state reg.
verisimilitude: How much chip design still happens from a text editor, instead of dedicated tooling?
asciilifeform: verisimilitude: ~100%
asciilifeform: a 'case' statement results in an electrical switch (i.e. each case 'exists' at all times, but 'fires' only if the switch variable equals the given value)
verisimilitude: Only Chuck Moore comes to mind as a counterexample I recall well.
asciilifeform: verisimilitude: moore, and in general 1980s processes. for that matter symbolics co. had a 100% cl top to bottom ic design thing, 'ns'
verisimilitude: Neat.
asciilifeform: verisimilitude: basic mechanics, however, are the same. verilog/vhdl can be considered 'syntactic sugar' ; the underlying primitives are same in all known fab processes (e.g. flipflop is still a flipflop no matter out of what made)
verisimilitude: Say, asciilifeform, I've mentioned before how I first came across loper-os many years back, and it's been an influence, regarding what machines should be. One of my major ideas is that text shouldn't be used for programming at all, and that dedicated tooling is, or should be, the future of programming; have I been anything of an influence in this respect?
asciilifeform: verisimilitude: i actually started from a 'softer' version of this position : i.e. 'if there is a more effective human-to-comp i/o than text editor, then it then oughta be used.' so far not encountered any that impressed upon me the 'this cannot be achieved with text editor, even augmented one'. tho admittedly have not played extensively w/ interlisp.
asciilifeform: verisimilitude: as for your item -- i admit , have not had chance to experiment in depth. so cannot answer re 'the win from non-text' in subj.
asciilifeform: ( see also earlier thrd re subj, w/ verisimilitude et al )
snsabot: Logged on 2020-08-08 21:47:05 asciilifeform: only ever used 1 type of 'non-text programming' system -- electrical schematic editors. and they're a nightmare imho
verisimilitude: Well, just let me know if any interest to use mine MMC arises, and I'd be elated to step one through it. That most recent I've produced is more of a toy than that which preceded it, but its purpose is to test a better model more than anything.
verisimilitude: I'd like to have a 6502 targeting finished, or at least started, within 2021.
verisimilitude: There's a very heavy difference between ``What's the random instruction mnemonic again?'' and pressing a single key to answer questions.
asciilifeform: verisimilitude: see, asciilifeform also uses heavily-customized text ~editors~ where 'press 1 key and get the asked-for 200-character name if need be'. but the representation is still a text.
verisimilitude: http://logs.nosuchlabs.com/log/asciilifeform/2020-08-08#1027766 I've felt similarly, until lately; I'm interested in programming systems which make a recollection system, undo and redo, automatic and mandatory; the model of ``functional data structures'' seems it could be particularly suited to this.
snsabot: Logged on 2020-12-29 14:10:03 asciilifeform: not into haskellism, however.
asciilifeform: verisimilitude: when i hear 'programming w/out text', i think of schematic layouts (electrical, or 'labview'-type item) . or at least interlisp-style lisp-with-trees where can only edit the tree, but not insert/remove chars arbitrarily
asciilifeform: thus far verisimilitude's item strikes me as simply a very good asmer (i had a similar one for msdos realmode, which 'knew' e.g. what regs are valid operands for MUL, and so forth)
verisimilitude: That's how I'd prefer to program Lisp, yes; I've imagined a scheme were a LET is either unnecessary, or at least well-hidden, for using the same result from a function multiple times, without naming it.
verisimilitude: There's another difference, however, asciilifeform.
asciilifeform: verisimilitude: as in 'anaphoric macros' ? ( asciilifeform at one time thought these to be great idea, until tried to use, lol, and developed allergy for any kind of 'invisible' moving parts in programs )
snsabot: Logged on 2020-12-16 20:37:03 asciilifeform: most of what is illustrated in these works, imho ought not to be done. e.g. anaphoric macros. 99++% of the time simply abused by folx who want to 'look clever', and in fact serves no useful purpose, proggy becomes ~less~ readable.
verisimilitude: When I press one key and give it the answers, I'm not greeted by just whatever names or syntax an assembler wants; I'm given a description of what happens intended for a human, because it never needs to be fed to a machine.
verisimilitude: No, as in ``Split this line and feed it to two inputs.'', but nicer.
asciilifeform: verisimilitude: this still strikes me as 'very good editor'. imho all programming oughta happen inside such a tool.
asciilifeform: but imho mistake to say this is 'escape from text'. the underlying representation is still a text, and my ~reading~ of it takes place w/ a text reader.
asciilifeform: 'escape from text' would be if e.g. i needed a tree viewer or schematic renderer (say, w/ 3d ball!!1) simply to read the thing.
verisimilitude: Well, I also have a heavy distaste for what passes as text in modern systems.
verisimilitude: I mustn't let current restrictions inhibit mine ideas for when I'm finally free of them, asciilifeform, and I've considered nice diagrams and other things I could add to mine MMC model, but it's still fundamentally using digits and text and other things to tell the human what's happening.
verisimilitude: All I can do is what led to the current state, which is pursue things for their own worths, and then find ways to integrate them into mine other programs as I notice niceties they bring.
asciilifeform: aha. and not only 'uses digits, text' but it is entirely readable as a text, i.e. you could dictate it over a telephone and it'd make sense. (which imho is an adequate litmus re 'is text')
verisimilitude: It's text in the absolute sense, but it's not a character stream to be fed into something, and so it's not text in the computing sense.
verisimilitude: Now, I can't avoid some character sequences no matter what, such as names, unless I want to enable replacing them with arbitrary drawings, but this is a tad different again, in that assembling character sequences is how humans name most things with language.
verisimilitude: When it comes to machine code, I think I'm at least close to the limits of programming it without text.
verisimilitude: So, I'm not a zealot wanting to entirely eliminate it, but I damn sure don't want it where it's unnecessary.
verisimilitude: Most programming is with text represented as character streams, which is both weak and, I think, entirely unnecessary. After enough removal, something such as written language names may stay as a good and necessary idea, although I'd like to experiment with a higher-level language which even elides those.
verisimilitude: This language is still but an idea, and even then it's still text in the absolute sense, but it's text in the sense a human puts on paper, not as a teletype punches.
asciilifeform: fundamentally what program 'is' , is ast. and if canonical representation were sane, rather than 'stream of text', then could much more meaningfully vdiff'em; and avoid idiocies in the vein of 'tab vs space' holywar, etc. but presently we haven't an agreed-upon canonical ast representation 'for errything'.
verisimilitude: Well, machine code isn't an AST.
asciilifeform: verisimilitude: is simply a very comb-like ast.
verisimilitude: Yes, I've given thought to how my model passes text in enabling some such manipulations.
verisimilitude: Sure, and this conversation is just atoms, but some models lose their usefulness at a point.
asciilifeform: verisimilitude: how does it lose usefulness ? the instrs still take params, which are constrained (e.g. a shortjump vs long takes diff. bitnesses of target, on whatever machine)
verisimilitude: I simply don't see much point in thinking of machine code as an AST. My latest model uses a flat doubly-linked list, but that's merely the internal representation I've found least prone to error so far.
asciilifeform: it's still an ast, and the 'a' is illustrated in that e.g. you don't actually care if it's 'mul' or 'MUL', 'jmp' or 'JmP', or whether preceded by a tab or 4 spaces, and whether space after comma !
asciilifeform: or rather, you and i might care, but asmer does not
verisimilitude: I don't care about the mnemonics, because there aren't any.
verisimilitude: My model entirely avoids those concerns.
asciilifeform: aha, you care about the underlying item. which is.. ast
verisimilitude: It's a sequence of bits.
verisimilitude: I care about the numerical representation.
asciilifeform: observe that -- even in verisimilitude's machine -- not all possible seq's of bits are equally-interesting programs.
verisimilitude: Yes.
verisimilitude: I've located a link which is interesting from earlier.
verisimilitude: http://logs.nosuchlabs.com/log/asciilifeform/2020-08-08#1027817 This was a reasonably interesting read, although I disagree with the author's thesis.
snsabot: Logged on 2020-12-29 14:55:03 asciilifeform: fundamentally what program 'is' , is ast. and if canonical representation were sane, rather than 'stream of text', then could much more meaningfully vdiff'em; and avoid idiocies in the vein of 'tab vs space' holywar, etc. but presently we haven't an agreed-upon canonical ast representation 'for errything'.
verisimilitude: Now, the author believes weaker languages are the solution to programs manipulating programs, but I think dedicated tooling is the true solution. When reading this, I remarked on how mine MMC model allows transparent renaming, as an example, because it ``knows'' names intimately, and programs reference them directly, not by their identifiers.
asciilifeform: verisimilitude: illustrative of 'we need ~less~ powerful...' , is e.g. asciilifeform's 'peh', where went through great lengths to constrain the set of operations to where program can be reasoned about for safety-critical application
verisimilitude: As for diffing and whatnot, I've found it's much easier to reason about combining machine code programs and whatnot when they're represented as doubly-linked lists, compared to arrays.
asciilifeform: verisimilitude: what does the doubleness of the links get you ?
verisimilitude: The interface of my model heavily constrains the manipulations which are pleasant to consider, however.
verisimilitude: It gets me what's effectively an array, but with convenient rearranging.
verisimilitude: I foolishly failed to realize part of mine array scheme was just badly building a doubly-linked list-like model.
asciilifeform: verisimilitude: right, not disputing that doubly-linked list is easier to rearrange; but how does it help in diffing ?
verisimilitude: Oh, it's just generally easier to reason about, when combined with some other changes.
verisimilitude: An example would be no shifting around to align subprograms, say; this isn't difficult with an array, but it's much easier with a doubly-linked list; I could think of another example given enough time.
asciilifeform: i admit, is mystery to me, how (in doubly-linked list, think of what kind of degenerate structures can exist! vs. in single-linked, the only dangerous -- and even then , only in the context of mark&sweep gcism -- is cyclic)
verisimilitude: They're interesting; my D shows a Lisp-flavoured approach to them.
verisimilitude: Singly-linked lists conveniently avoid many questions, yes, but finding satisfactory solutions to them is fun. My D:LENGTH returns three values, as an example.
verisimilitude: The weaknesses of singly-linked lists allow for more concise interfaces.
asciilifeform bbl:teatime

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