feedbot: http://qntra.net/2020/01/hawaiii-man-kills-two-cops-houses-around-suspects-suspected-location-burn/ << Qntra -- Hawaiii Man Kills Two Cops Houses Around Suspect's Suspected Location Burn
asciilifeform: wb mike_c
mike_c: hello ascii
asciilifeform: mike_c: what've you been up to ?
BingoBoingo: welcome back mike_c
mike_c: hey bingo. alf, not up to much of interest except working my way through ffa chapters.
asciilifeform: mike_c: oh neato. how far along are you ?
BingoBoingo: mike_c: Mircea Popescu will be paying once he returns to Costa Rica, sometime before the end of March by his estimate.
BingoBoingo: mike_c: Sign a payment address with a note declaring it as the desired distination for your payment, and I'll throw it in deedbot
mike_c: I saw Bingo, I'll get you a signed address.
shinohai: heya mike_c ... congrats on favourable ruling from the fuhrer, and gl with ffa !
mike_c: alf - let me tell you, it's not a straight line. read ffa, go read more about Ada, read ffa, go learn more math.
mike_c: definitely some missing pieces of my trunk of knowledge in this area
asciilifeform: mike_c: i'm curious re the specifics (item was intended as, among other things, ada tutorial; and the maffs req'd in principle dun exceed grade school level)
mike_c: you learned this in grade school?
asciilifeform: mike_c: barrett's method, obv. not; the elements of the proof, however, defo -- it's grade-school algebra ( solve system of inequalities )
mike_c: the ada in the chapters is easy, but i'm interested in understanding ada better than the demands of the ffa walkthrough
asciilifeform: mike_c: fair'nuff. certain elements of the lang that i did not use are rather complicated ( generics, streams, for instance )
asciilifeform: i avoided'em deliberately ( they not only make for headache for reader, but complicate the job of tearing apart built binary to verify 'honesty' of compiler )
mike_c: all these things are straightforward enough if you're "just programming" with them, but the thing that interests me really is figuring out whether I can believe that this whole thing is rock solid, constant-time executing, etc.
mike_c: shinohai: thanks. certainly a favorable step.
asciilifeform: mike_c: there are examples given of how to test particular iron to verify constant-time operation, but a serious user i expect will also want to disasm the built binary ( to determine that bounds checks are not optimized out by a broken compiler, for instance )
asciilifeform: neither is a substitute for actually understanding the proofs, however
mike_c: ^ yes.
asciilifeform: mike_c: one of the reasons i picked ada, is that it is a stolidly procedural lang, makes for relatively close correspondence b/w the algo and compiled proggy
asciilifeform: ( considered and rejected, e.g., ml, because there -- not so much )
asciilifeform: in principle ffa is quite easy to 'human compile' to asm for $arch of choice, as there is no use of 'clever' lang features
asciilifeform: mike_c: my long-term aim is to publish exactly such ffa (i.e. hand-compiled, commented) for certain archs; and eventually to offer irons with same in rom.
mike_c: hm, the value of it in rom is.. i'm missing how that is better than signed binary
asciilifeform: mike_c: to break away from x86/arm liquishit archs.
mike_c: oh, so you mean a PCB with it?
asciilifeform: correct
mike_c: got it
mike_c: that is cool
mike_c: how are you going to do that? FPGA?
asciilifeform: fpga.
asciilifeform: current unpublished draft of this, is targeted to a simplified 'mips' w/ no branch prediction or pipeline ( similar to the one in my mips emulator )
asciilifeform: ideally would have simply a mipslike with ultrawide alu (which would obsolete good 80% of ffa by weight) but no existing fpga is large enuff to house this.
asciilifeform: ( and in fact the only properly kosher, i.e. wholly reversed, fpga on the market , is afaik still 'ice40' , which is rather small . just barely holds a useful mipslike w/ 64bit regs. )
mike_c: a piece of hardware with reliable entropy, another with reliable math, that's a couple of strong building blocks!
asciilifeform: mike_c: the 'holy grail' still would be an iron which can 4096bit rsa 'at line rate' (1G/s) , but this is as i understand impossible w/out baking silicon.
asciilifeform: mike_c: naturally would integrate 'reliable entropy' into any such.
asciilifeform isn't under any illusion that subj, per se, is mass-marketable. but it'd make certain other items ~thinkable~ (specifically, a proper crypto-routed net on top of ye olde ip)
asciilifeform: without fast, constant-time rsa -- any realtime mechanism will leak privkey.
asciilifeform: ( to be pedantic, without the 'fast' -- ddosable. )
asciilifeform: ( bvt was able to give 3.5x speedup on x86 via asm massage but this still not anywhere close to 'realtime 1G/s nic' )
mike_c: BingoBoingo: http://paste.deedbot.org/?id=EX2d good?
mike_c: asciilifeform: have you written up how you envision crypto-routed net? I wonder if key rotation with FG as entropy source would be sufficient
mike_c: hard to say of course how long key has to be good for before priv-key is leaked
mike_c: also, please dump a signed delivery address in here sometime for your BTC once I receive mine
asciilifeform: mike_c: the addr on my www, signed
asciilifeform: mike_c: re net -- imho premature, of yet, to write in detail. ( wrote a bit re how imho ~not~ to do it, in the epic flamefests w/ mp in '15-'16... )
BingoBoingo: mike_c: The text looks good.
asciilifeform: http://logs.nosuchlabs.com/log/asciilifeform/2020-01-20#1005367 << considering that enemy can be safely assumed to log 100% of packets, in any given situation -- there neither is nor cannot be such a thing as 'acceptable rate of privkey bit leakage'
snsabot: Logged on 2020-01-20 20:34:28 mike_c: hard to say of course how long key has to be good for before priv-key is leaked
mike_c: but if you rotate keys faster than they can crack them..
asciilifeform: the latter is an unknown-unknown
mike_c: yeah
asciilifeform: classical branching-code impl.s of rsa (e.g. koch's) leak entire priv after coupla hundred privops (to anyone with sufficient 'ears' to listen correctly)
mike_c: well.. ok then! that's crazy
asciilifeform: and w/ current algos ( e.g. field sieve ) any 25% of the priv bits are ~as good as whole thing
mike_c: i feel like this is something you would know - how much does it cost to build an asic instead of fpga?
asciilifeform: mike_c: very strongly varies depending on qty of units and the 'process' ('micrometrage')
asciilifeform: a 1980s-style item, in qty. 100, can cost as little as 100 $ / ea. but the rub is that very rarely this can be done in 1 shot, usually multiple prints req'd
asciilifeform: there is a 2017 thread where i contacted various small-run fab houses, unfortunately dun have the link handy (and the #s are likely to be out of date nao)
mike_c: when you were developing fg?
mike_c: multi-project wafers seem to bring the cost down a lot. more reading to do..
asciilifeform: mike_c: this was long after fg
snsabot: (trilema) 2018-10-25 asciilifeform: http://btcbase.org/log/2018-10-25#1865735 << i took a stab at this 2y ago, was very frustrating on acct of asic-baking not being a 'cash and carry' process like e.g. pcb-baking, but a heavily meat-powered affair where the derps want to 'get to know you' to figure out how much they can fleece
snsabot: (trilema) 2018-10-25 asciilifeform: there's a coupla 'small scale' fabs, but on close examination smell like ripoff, they ship with literally 0 guarantee of yield , and in laughable qty , and with laughable transistor count, and -- to add insult to injury -- die packaging not included, you gotta somehow find someone to do it, somewhere
snsabot: (trilema) 2018-10-25 asciilifeform: mircea_popescu: the sad bit is that conventional asic process , as available today in cn , tw, etc, is also like this. you are forced to use 'standard cells' supplied by vendor.
feedbot: http://qntra.net/2020/01/usg-copper-isp-network-operator-frontier-moving-towards-bankruptcy/ << Qntra -- USG Copper ISP Network Operator Frontier Moving Towards Bankruptcy
feedbot: http://fixpoint.welshcomputing.com/2020/draft-gbw-node-frontend-part-6/ << Fixpoint -- Draft gbw-node frontend, part 6